Is any operation, program, or device that transfers data to or from a computer.
Input/Output
This is the communication between an information processing system, such as a computer, and the outside world, possibly a human or another information processing system.
Input/Output
The signals or data received by the system
Input
The signals or data/information sent from it
Output
Humans use _______ (or other system) to communicate with a computer.
I/O devices
________ allow input and output to occur.
Peripheral devices
Used by the processor when the address of the I/O device is in the direct memory space, and the sequence to read/write data in the device are the same with the memory read/write sequence
Memory Mapped I/O
Similar with memory mapped I/O, but the processor has a second set of control signals to make the distinction between a memory access and an I/O access.
Isolated I/O
Memory locations and I/O devices can be located at the same address, which makes this extra control signal necessary.
Isolated I/O
The basic operation cycle of a computer
Instruction Cycle
It is the process by which a computer retrieves a program instruction from its memory, determines what actions the instruction requires, and carries out those actions.
Instruction Cycle
This cycle is repeated continuously by the central processing unit (CPU), from boot up to when the computer is shut down.
Instruction Cycle
In the first phase, the processor generates the necessary timing signals to fetch the next instruction from the memory system.
Fetch
The instruction is transferred from memory to an internal location inside the processor (the instruction register)
Fetch
The memory places the instruction on the Data Bus, and the processor then copies the instruction from the Data Bus to the Instruction Register.
Fetch
During this phase the processor (if required by the instruction) will get any operand(s) required by the instruction.
Decode
The processor transfers the instruction from the instruction register to the ______ Unit.
Decode
It compares the instruction to an internal table, and when a match is found, the table contains the list of macro instructions (a number of steps) which are required to perform the instruction.
Decode
During this phase, the processor executes the instruction.
Execute
The final part of _______ phase is to adjust the Instruction Counter to point to the next instruction to be executed
execute
A delay experienced by a computer processor when accessing external memory or another device that is slow to respond.
Wait States
A program or process in a wait state is ______ for the duration of the wait state.
inactive
In general, the more time a processor spends in wait states, the _______ the performance of that processor.
slower
(T/F) I/O devices are much slower than CPU and memory, thus they can have timing problems when interacting with CPU
True
An application program that communicated with one other program might send that program a message and then go into a wait state until it was ________ by a message back from the other program.
reawakened
(T/F) When a computer processor works at a faster clock speed than the RAM that sends it instructions, it is set to go into a wait state for one or more clock cycles so that it is synchronized with RAM speed.
True
Most CPUs have a control input signal called _____ (or similar) to deal with this problem
READY
(T/F) Normally, the READY input is high; when the CPU outputs the address of the I/O device and sets the proper control signals, enabling the three-state buffers of the I/O device interface, the I/O device sets READY signal to low
True
(T/F) CPU will read this signal and continue to keep the I/O device addressed until the I/O device will set READY back high again; the CPU reads the data from the bus and continues its normal operation
True
These are used so the CPU can perform useful work while waiting for much slower devices.
Hardware Interrupt
It is a signal to the processor emitted by hardware or software indicating an event that needs immediate attention.
Hardware Interrupts
An ________ alerts the processor to a high-priority condition requiring the interruption of the current code the processor is executing.
interrupt
(T/F) The CPU may output a request to an I/O device and instead polling the device or entering a wait state, the CPU then continues executing instructions, performing useful work.
True
When the I/O device is ready to transfer data, it sends an ________ to the CPU, via a dedicated signal on the control bus.
interrupt request
The CPU acknowledges the interrupt, by asserting an _______ signal and reads the data (or perform whatever action is required).
interrupt acknowledge
The _________ performs arithmetic calculations
Arithmetic Logic Unit
An ________ is a digital circuit used to perform arithmetic and logic operations.
Arithmetic Logic Unit
Typical operations performed by the ALU are:
add, subtract, negate, divide, multiply, shift/rotate, etc.
Normally works on two numbers at a time
Arithmetic Logic Unit
The ________ to the ALU are the data to be operated on (called _______) and a code from the control unit indicating which operation to perform.
inputs, operands
Its output is the _______ of the computation.
result
Often, one of the numbers is found in an ______ location of the processor, whilst the other is a constant or found in the ______ system.
internal, memory
The reason for most arithmetic and logic operations using operand's which are located inside the processor is _______.
speed
This is due to not having to perform a fetch cycle for transferring the operand from the memory system to an internal hold point (called ______) in order to execute the instruction.
latch
A register in a computer processor that contains the address (location) of the instruction being executed at the current time.
Program Counter
As each instruction gets fetched, the program counter increases its stored value by 1. During the fetch cycle, the processor places the contents of this counter on the address bus.
Program Counter
A _______ is issued on the control bus, then timing signals are generated to transfer (copy) the instruction from the memory location in system memory to an internal hold latch inside the processor (called the ________).
read signal, instruction register
During the decode cycle, the instruction counter is adjusted to point to the next instruction to be executed from system memory (calculated from the current instruction).
Program Counter
It is the part of a CPU's control unit that stores the instruction currently being executed or decoded.
Instruction Register
In simple processors each instruction to be executed is loaded into the instruction register which holds it while it is decoded, prepared and ultimately executed.
Instruction Register
(T/F) Some of the complicated processors use a pipeline of instruction registers where each stage of the pipeline does part of the decoding, preparation or execution and then passes it to the next stage for its step.
True
Modern processors can even do some of the steps out of order as decoding on several instructions is done in _______.